ALPHACORE INC — National Aeronautics and Space Administration SBIR Phase I: S13
ALPHACORE INC — SBIR Phase I award from National Aeronautics and Space Administration.
- Amount
- $156,494
- Agency
- National Aeronautics and Space Administration
- Program / Phase
- SBIR · Phase I
- Topic
- S13
- Solicitation
- SBIR_23_P1
- NAICS
- —
- Place of performance
- AZ
- Period
- 2023-07-28 → 2024-02-02
Description
The solicitation topic S13.03 indicates NASA#39;s need to develop technologies for producing space systems that can operate without environmental protection housings in the extreme environments of NASA missions. Key performance parameters of interest are survivability and operation under the following conditions: 1) Very low temperature environments (e.g., temperatures as low as -180 deg;C, for several NASA missions); 2) Combination of low temperature and radiation environments (e.g., surface conditions at Europa of -180 deg;C with very high radiation).In response to these needs, Alphacore proposes to design and characterize an innovative radiation-hardened mixed-signal (analog amp; digital) library that is capable of operating at a wide temperature range which covers cryogenic temperatures (-230 deg;C to +85 deg;C). The radiation hardness includes total ionizing dose (TID) of 300krad(Si), immunity to single event latchup and functional interrupt (SEL and SEFI), and low single event upset (SEU)nbsp; rate.Alphacorersquo;s proposed mixed-signal library includes three key components to any mixed-signal SoC, or ASIC: a phase locked loop (PLL), an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC), to be implemented in the GlobalFoundries (GF) 22nm fully depleted silicon-on-insulator (FDSOI) CMOS process (22FDX).The 3-item mixed-signal library is not the only deliverable in this program, Alphacore will also develop a set of design guidelines for the 22FDX process that space mission IC designers can use to achieve both radiation-hard and highly reliable low-temperature capable systems. The guidelines will include biasing (VDD, back bias) and layout rules which mitigate deleterious effects, such as hot carrier degradation and TID. Alphacore will also develop simulation models that include both TID models and low temperature models. These models can be used in most common design flows.