DASH TECH INTEGRATED CIRCUITS, INC. — Department of Defense SBIR Phase II: HR0011SB20224-13

Description

The DASH SoC provides efficient, flexible, high-performance processing for sensing and communications edge applications. High-performance processors are primarily limited by inter-chip data transfer and latency, which is further complicated by the inclusion of flexible I/O. Fortunately, the DASH SoC framework overcomes the classical trade between flexibility and efficiency. The ontologically driven analysis identifies critical inter-application kernel accelerators (for example, FFT, FEC). The DASH SoC also uses an efficient domain-adaptive processor (DAP) to fill the gaps. The DASH Software framework automates the traditionally complex task of mapping application tasks to accelerators and scheduling execution, reducing the barrier to new workload adoption. We extend this philosophy to create a flexible I/O framework for the heterogeneous DASH SoC.   In the proposed work, we refine the DASH SoC and framework by identifying critical interfaces for a range of applications and by extending the DASH architecture to incorporate this I/O. We analyze a range of embedded processing applications to understand the I/O requirements, including inter-chip and intra-chip dataflow. We design and demonstrate a configuration-driven approach to I/O. This approach includes double data rate (DDR) support, external interfaces and protocols, high-speed sensor data, and other standard interfaces. We implement an architecture and SoC design incorporating this reconfigurable I/O IP to support different I/O requirements. We provide an SoC tapeout design. In collaboration with DARPA, we use this design on a DARPA-funded TAPO run, producing a demonstration-capable SoC. Finally, under our option, we develop and demonstrate a reference system that simplifies engineering efforts for transition partners. We enhance the next-generation embedded processor that dynamically and efficiently executes the computational needs of a wide range of commercial and DoD edge applications. Critically, we determine the I/O requirement of critical DoD applications and provide the modified architecture and physical design to address these needs. These enhanced, automated, reconfigurable I/O capabilities enable substantial transition opportunities and address feedback from potential transition partners.