INTEGRATED TEST SOLUTIONS, INC. — Department of Defense SBIR Phase I: AF172-005
INTEGRATED TEST SOLUTIONS, INC. — SBIR Phase I award from Department of Defense.
- Amount
- $148,787
- Agency
- Department of Defense · Air Force
- Program / Phase
- SBIR · Phase I
- Topic
- AF172-005
- Solicitation
- 2017.2
- NAICS
- —
- Place of performance
- MA
- Period
- 2017-11-17 → 2018-09-13
Description
Hardware modelers such as the Teradyne D300 or the Synopsys MS-3200 or MS-3400 are used to provide physical modeling of digital integrated circuits such as custom VLSI logicand or complex hybrid IC's. These classes of devices are not easily modeled in a simulation software environment such as Teradynes LASAR. Currently the hardware modeling system providers such as the Teradyne and Synopsys have discontinued production and support of their respective hardware modeling systems. These systems are critical to the successful development of test programs being developed at numerous Air Force and Navy locations. A method to utilize commercially available digital test hardware, currently employed in VDATS and LMSTAR ATE platforms, provides an ideal solution to the hardware modeling obsolesce issue. Using the Di-Series digital test subsystem as the hardware interface to LASARs digital simulator would eliminate the obsolescence of proprietary hardware while maintaining backwards compatibility with existing hardware models.The objective of this research is to investigate the use of the Teradynes Di-Series digital subsystem as a replacement of the D300 hardware. The investigation will address LASAR to MDLMAN communications,Di-Series compatibility with D300 and hardware interfacing in assessing the suitability and functionality of the proposed solution.