ENGIN-IC INC — Department of Defense SBIR Phase I: AF222-0020

ENGIN-IC INC — SBIR Phase I award from Department of Defense.

Amount
$149,876
Agency
Department of Defense · Air Force
Program / Phase
SBIR · Phase I
Topic
AF222-0020
Solicitation
22.2
NAICS
Place of performance
TX
Period
2023-01-24 → 2023-10-24

Description

ENGIN-IC proposes the development of a wideband GaN-on-SiC high efficiency amplifier to achieve the goals of this program.  ENGIN-IC applies a novel, patented circuit topology to achieve simultaneous SWR and high PAE load impedance match across a decade bandwidth or more.  The circuit topology proposed is quite different from that of a distributed amplifier.  The topology proposed enables higher amplifier PAE across a wide bandwidth, and greatly reduces the size of the amplifier in comparison to distributed amplifier circuit topologies.  Such amplifiers can then be sized easily to fit in 3 mm or smaller array spacings.    ENGIN-IC has built more than 10,000 3-W, 33% PAE 2 – 18 GHz GaN amplifiers over the past three years.  Amplifier dimensions are 4.2 mm x 1.7 mm – the parts are very narrow in width, and support T/R element spacings of 3 mm or less.  These amplifiers offer 30-dB small-signal gain and 13-dB or better I/O return loss across 2 to 18 GHz.  This production experience forms a strong foundation for the proposed study and development work for this AFRL high PAE amplifier program.   A two-stage, 2 to 20 GHz GaN amplifier will be demonstrated by ENGIN-IC later this summer, offering 2-W output power and 45% PAE across much of the band.  This will set a new efficiency record for near decade bandwidth solid-state amplifiers in this frequency range.     During Phase 1, ENGIN-IC will prepare a detailed comparison of wideband GaN amplifiers simulated using GaN transistors from four or five different foundries.  These transistors should enable wideband hybrid high PAE feedback amplifiers to achieve power levels > 5 W across 2 to 18 GHz. ENGIN-IC proposes study of other foundry process options discussed in the proposal that will enable higher Q, lower voltage drop passive circuit components.  During Phase 1, ENGIN-IC will prepare a comparison summary of these foundry process options, and their impact on wideband amplifier PAE.   ENGIN-IC will study different assembly processes for the wideband, high PAE GaN amplifier as well.   A proper selection of a) GaN foundry process; b) passive circuit / component processes; and c) assembly processes should enable fabrication of wideband, high PAE amplifiers offering 3-W or higher output power, and > 50% PAE across 2 to 18 GHz.  These amplifiers will have widths (or y-dimensions) of 2 mm or less.   By the end of Phase 1, ENGIN-IC will provide a design simulation of such an amplifier, using the study-recommended foundry and assembly processes.