AK Circuit Corporation — National Aeronautics and Space Administration SBIR Phase I: S3

AK Circuit Corporation — SBIR Phase I award from National Aeronautics and Space Administration.

Amount
$108,125
Agency
National Aeronautics and Space Administration
Program / Phase
SBIR · Phase I
Topic
S3
Solicitation
SBIR_18_P1
NAICS
Place of performance
OH
Period
2018-07-27 → 2019-02-15

Description

<p>An intelligent power management and distribution system is an essential component of future NASA long duration flights in deep space. The current power management system for manned NASA missions in lower earth orbit depends heavily on operators in the ground control center. As mankind ventures into deep space, the existing Power Management and Distribution (PMAD) system will not be able to respond fast enough for ever-changing power requirements in the harsh deep space environment.</p><p>The proposed innovation is an autonomous digital-hardware controller with built-in Active Disturbance Rejection Controls (ADRC) for long duration deep space flights. The proposed Autonomous Modular Digital Controller (AMDC) provides high efficient, reliable, fault-tolerant, and intelligent power management for deep space missions.&nbsp;</p><p style="margin-left:0in; margin-right:0in">The following are the relevance and significance of the proposed innovation to the subtopic S3.03:</p><ul><li><u>Autonomous local power management to improve system reliability.</u></li><li><u>Built-in active disturbance rejection controls for system robustness.</u></li><li><u>Active switching frequency control to improve power quality.</u></li><li><u>Multi-functional&nbsp;operation configurations to reduce mass/volume.</u></li><li><u>Self-diagnostic and fault/limit recording for fault-tolerant operations.</u></li> </ul><p style="margin-left:0in; margin-right:0in">The current state of art technologies for controlling power electronic switching devices is using mixed analog and digital controls with fixed controller gains. A few of existing all digital controls are microprocessor based controls with a single-thread software written by C programming language. <u>The proposed AMDC utilizes the parallelism of the Field Programmable Gate Array (FPGA) to implement high-speed, multi-threads, all digital hardware, register-based state machines, and intelligent gain controls with active disturbance rejections.</u></p><p style="margin-left:0in; margin-right:0in">There are many current and future potential NASA applications for the AMDC controlled PMAD systems.</p><p style="margin-left:0in; margin-right:0in">&nbsp;</p>