HYPRES INC — Department of Defense STTR Phase I: N17A-T027

Description

Superconductor digital circuits, operating at very high clock speed, can directly process wideband digitized radio frequency (RF) signals. By integrating such digital processing circuitry together with superconductor analog-to-digital converters (ADCs), we propose to develop the next generation digital-RF receivers. Leveraging the recent development of multiple superconductor ADCs on the same chip and supported by fast digital data links to room-temperature processors, we propose new digital circuitry enabling digital true-time-delay beamforming. In Phase I, we propose to design these new digital signal processing (DSP) circuitry, combine with multiple ADCs on a new integrated circuit (IC), and release it for fabrication. Testing of the new IC, as well as more advanced designs, are planned during the Phase I option. Additionally, we propose to develop a scalable architecture for implementing digital-RF beamforming receivers of increasing complexity, in terms of both the number of ADCs and the number of simultaneous beams, in the future.