QUINSTAR TECHNOLOGY, INCORPORATED — Department of Defense SBIR Phase I: AF161-148

QUINSTAR TECHNOLOGY, INCORPORATED — SBIR Phase I award from Department of Defense.

Amount
$149,812
Agency
Department of Defense · Air Force
Program / Phase
SBIR · Phase I
Topic
AF161-148
Solicitation
2016.1
NAICS
Place of performance
CA
Period
2016-06-09 → 2017-03-08

Description

ABSTRACT: QuinStar Technology proposes to develop a 45 W, high-efficiency solid-state power amplifier (SSPA), operating over the 43.5 to 45.5 GHz band, for low-cost SATCOM ground terminals. This will be accomplished by employing two major innovations. First, we plan to utilize wide bandgap Gallium Nitride (GaN) on Silicon Carbide (SiC) device technology to fabricate our high-efficiency MMICs. Operating at a higher voltage (typically 28 V versus 4 V for GaAs), GaN permits higher power densities which results in lower matching and cell combining losses, making these MMICs more efficient. Secondly, we are proposing to utilize a switching mode of operation (inverse Class-F) to enhance the device efficiency. While this method has demonstrated efficiencies of 80% at 2 GHz, these levels have not yet been realized at Q-band frequencies. Computer simulations indicate that by using this method, device PAE levels of 60-65% are possible at 44 GHz. Finally, MMIC simulations at Q-band frequencies indicate that even with circuit losses, we can still maintain the chip efficiency above 40%. The preliminary layout and performance of this MMIC is included in the proposal, together with the overall SSPA configuration (including the combiner) and projected performance.; BENEFIT: Anticipated Benefits:Currently the efficiency state-of-the-art for power MMICs is in the range of 15% at Q-band frequencies. With packaging, combining networks and power conditioning, the amplifier efficiency rarely exceeds 10%, and is often in the single digit range. Our approach will result in a power amplifier with an efficiency of 35% or better. The impact on system prime power and waste heat is illustrated by the following example: With todays technology, using 10% and 45 W for its DC-to-RF efficiency and output power respectively, the SSPA will require 450 W of DC prime power. However, with this new amplifier technology (35% DC-to-RF efficiency), the SSPA will require only 129 W of DC power, a savings of over 300 W. In addition to this substantial reduction in prime power, this high-efficiency SSPA approach will greatly reduce the load on the waste heat removal system, and thereby reduce its cost. Furthermore, with a more efficient amplifier, we anticipate less self-heating and therefore improved reliability. Due to the exponential relationship between temperature and lifetime, this reduction in dissipated power, and thereby temperature, can result in a lifetime improvement of 100 times or more.Commercial Applications:Applications for high-efficiency Q-band amplifiers abound in the commercial market segment as well as DoD.These include Q-band SATCOM applications for the Army to radar applications for all military services in the adjacent radar bands (33 to 38 GHz). Clearly, once demonstrated, this high-efficiency technology can be easily transferred to lower frequencies. For radar, high efficiency is particularly important for airborne applications, such as UAVs and fire control radars, where the prime power is limited. In the commercial segment, a massive market exists for high-efficiency SSPA to replace aging tubes in SATCOM terminals. Additional markets include airborne terminals for commercial airlines using SATCOM, emerging communications applications in the 38-39 GHz range, weather and environmental monitoring radars operating in the 34 to 36 GHz band, aircraft landing systems to enhance or replace Synthetic Vision Systems (SVS) with EVFS at 35 GHz, Security and Surveillance radars for commercial, industrial and municipal applications and helicopter collision avoidance radars for brown-out and obstacle avoidance.Further, this technology is scalable. By using power combining technology, we can provide SSPAs with output power levels well beyond the current goals of this program. For example, with the proposed 8 W chip and a 16-way combiner, power levels above 100 W are readily attainable.