ALPHACORE INC — Department of Defense SBIR Phase I: SB153-004
ALPHACORE INC — SBIR Phase I award from Department of Defense.
- Amount
- $154,948
- Agency
- Department of Defense · Defense Advanced Research Projects Agency
- Program / Phase
- SBIR · Phase I
- Topic
- SB153-004
- Solicitation
- 2015.3
- NAICS
- —
- Place of performance
- AZ
- Period
- 2016-04-05 → 2017-04-21
Description
This SBIR Phase I proposal requests support for Alphacore, Inc. to design and characterize a 40Gsps (giga-samples per-second), 7-bit (ENOB > 6 bits), low-power (<500mW) analog-to-digital converter (ADC) for use in configurable phased array applications in the defense sector.The proposed ADC employs an innovative topology with high-bandwidth front-end sampling circuit combined with an interpolated flash-type ADC. Innovative and effective digital calibration is used to guarantee spurious free Nyquist frequency band which is an important requirement in phased array applications.The design will be implemented in a 28nm fully depleted silicon on insulator (FDSOI) CMOS technology.The maximum sampling rate of Alphacores ADC is 48 GS/s, resolution is 7-bits (effective number of bits, ENOB = 6.0 bits) and the power consumption is 480mW, not counting the consumption of the output interface. The ADC has analog input bandwidth of 33GHz. The sampling speed, ENOB and power have all been measured from transistor level schematic simulations, and are to a large part based on netlists extracted from layouts.