Accelogic, LLC — Department of Defense SBIR Phase I: SB152-004

Description

Graph analytics have emerged as a prominent computational workload in the defense community, and are representative of fundamental kernels in national security applications. Processing speed is a fundamental requirement for these applications. Massively-parallel hardware architectures promise to increase the performance of graph analytics. However, significant improvements in software technologies are needed to take full advantage of the raw processing performance that this hardware provides. To address this need, we will develop and implement the fundamental theory and methods of a groundbreaking technology for injecting extreme-speed acceleration into graph analytics software. This technology will support seamless acceleration of virtually any graph API (e.g., STINGER, GraphLab, Spark, OrientDB), and will take advantage of the underlying hardware system, possibly including COTS multi-core CPU, GPU, MIC, FPGA systems, or any combination of these. In Phase I we will develop a proof-of-concept prototype that will demonstrate the technologys ability to provide orders-of-magnitude acceleration for graph analytics. In Phase II we will work on maturing and refining the technology, driven by a concrete target of accelerating analytics relevant to DoD. We have secured complementary funds in the amount of $150,000 to ensure that the proposed Phase I work will be successfully accomplished in a timely manner.