IDEAS ENGINEERING & TECHNOLOGY, LLC — Department of Defense SBIR Phase I: ABSTRACT: IDEAS-TEK proposes to build a radiation hardened version of the open-source Ope

Description

ABSTRACT: IDEAS-TEK proposes to build a radiation hardened version of the open-source OpenRISC processor (32-bit RISC). OpenRISC is fully customizable and IDEAS-TEK has developed custom configurations that fulfill the solicitation"s requirements. Radiation hardening will be accomplished by using an open-source radiation hardened cell library for the 180nm technology node. The library is meant to provide cheap access to radiation hardened electronics by using 1) a cheap or free tool chain reliable for mid-complexity systems, and 2) a large feature size that provides both inherent radiation hardening and low fabrication costs at operation frequencies between 100 to 200 MHz. Innovation and benefits are twofold. First, a low cost, license free, radiation hardened 32-bit RISC on an ASIC will be made available. The low cost, license-free feature represents an advantage with respect to alternative processors available such as ARM, LEON-FT and OpenRISC-FT. Second, the open-source radiation hardened standard cell library will be validated. A successful effort will signify the availability of a low cost alternative for radiation hardened digital logic with acceptable clock speeds. Faster alternatives with smaller feature sizes that are currently available are significantly more expensive for similar radiation hardening characteristics. BENEFIT: Anticipated benefit of the proposed approach is twofold. First, a low cost and low power, yet powerful, radiation hardened ASIC with processing capability will be made available. This is significant since significantly less powerful and more costly radiation hardened processors (8-bit instead of 32-bit) are traditionally used in order to save power consumption and cost in the integration of sensors or actuators in a spacecraft. Second, fabricating the processor we propose will serve as a proof of concept and final validation for the open source radiation hardened standard cell library being developed at UNM under AFRL"s sponsorship. A success in this effort will signify the availability of a low cost alternative for radiation hardened digital logic with clock speeds in the neighborhood of the 100 to 200MHz. Current, faster and smaller alternatives are significantly more expensive for similar radiation hardening characteristics. The need for radiation hardened microelectronics is common to DoD and commercial spacecraft. The proposed low cost and low power 32-bit RISC processor and the low cost mechanism to fabricate radiation hardened microelectronics have the potential to be disruptive technologies as equivalent alternatives are currently significantly more expensive. The open source nature of the development will open up the range of applications to hobbyists, commercial and DoD developers, and academia. In addition this technology can be an enabler for broader deployment of small satellites (as low power, low cost, radiation tolerant computing is made available through this effort), which are considered an emerging technology today.