MIAO IC DESIGN LLC — Department of Defense SBIR Phase I: ABSTRACT: By reducing radiation through rad-hard design, device modeling and manufacture

Description

ABSTRACT: By reducing radiation through rad-hard design, device modeling and manufacture process, we at MIAO LLC technology will provide a state of art solution for 130 nm CMOS/SOI space borne, 10 MHz bandwidth with over 114 dB signal-to noise ratio (SNR) delta-sigma analog-to-digital converters at Total Ionizing Dose greater than 1 MRads. The device power consuming is estimating less than 80 mW. The significance of the innovations in radiation hardening design consists of the new dynamic biasing voltage regulator design uses a few transistors to achieve sensing and regulating. The similar functionalities required much more complicated designs in existing research. This new design also helps us to achieve the required 200oC temperature or higher. Dr. Barnaby not only developed accurate device models, but also has facilities to test the prototype delta-sigma ADC. The design innovation consists of the high performance low power MOS Current Mode Modulator and Quantizer, a modified Data Weighted Averaging realization is proposed for linearization the feedback DAC, and a double sampling scheme for reducing the Over Sampling Rate in half while keeping the SNR unchanged. Last but not least, the delta-sigma ADC output is realization with the standard mobile imaging architecture (SMIA) interface bus. BENEFIT: There are a number of potential applications for a rad-hard Low power, wideband delta-sigma ADC: Commercial and Defense space-based systems Flight critical control systems Space-based imaging and surveillance Particle detectors in radiation environment Wave analyzers Data acquisition and processing Seismic exploration Deep holes drilling