SECURBORATION, INC. — Department of Defense STTR Phase II: Modern processor design is trending increasingly toward multicore architectures. This is

Description

Modern processor design is trending increasingly toward multicore architectures. This is problematic for programmers because writing a correct parallel program is known to be difficult compared to writing the equivalent sequential program. Additionally, a wide body of sequential code has already been developed that cannot exploit the power offered by these new cores because it was written in a sequential manner. These two factors make it difficult to fully utilize modern multicore processors in many real-world use cases. The Tri-Tier Architectural Modeling Environment (TAME) is a system that automatically parallelizes sequential programs. Using TAME, binary artifacts compiled from sequentially written code can harness the computational power of multicore architectures. Crucially, TAME is also capable of parallelizing legacy binarieseven if there is no corresponding source code present. This parallelization requires virtually zero programmer effort and includes a self-verification mechanism to ensure correctness, providing a low-risk pathway to exploit modern processors using sequential code.