Sensor Electronic Technology, Inc. — Department of Defense STTR Phase II: This proposed research for Phase II consideration involves the growth of AlInN/GaN heteros

Description

This proposed research for Phase II consideration involves the growth of AlInN/GaN heterostructure field effect transistors (HFET) on bulk GaN substrates. By combining a homoepitaxial substrate for the growth of the heterostructures with the lattice-matching ability of the AlInN alloy, it is expected that the defect density in the eventual HFETs can be reduced significantally, ultimately improving device performance and reliability. By eliminating the need to use coventional, non-native substrates such as silicon carbide or sapphire, the highly defective buffer layers used to accommodate the lattice-mismatch can be negated. Furthermore, utilizing AlInN, the alloy composition can be tuned, resulting in a film which is lattice-matched to the underlying GaN buffer layer, eliminating generation of defects at the heterostucture interface which negatively affect the two-dimensional electron gas (2DEG). Therefore, we propose to utilize our proprietary MEMEOCVD growth technique to achieve lattice-matched AlInN/GaN heterostructures which will be deposited on low dislocation density bulk GaN substrates. Additionally, multiple optical and structural characterization techniques will be employed to estimate and optimize the defect density of the films.