NU-TREK, INC. — Department of Defense STTR Phase II: Nu-Trek is teaming with Arizona State University and Raytheon Vision Systems to develop a

Description

Nu-Trek is teaming with Arizona State University and Raytheon Vision Systems to develop a ROIC with on-chip data conversion. The ROIC uses Nu-Trek"s ultra low power ADC buffer, ADC core, and LVDS pre-driver. The ROIC is being developed for Raytheon"s Next-Gen, dual-band, IR FPAs. Three Nu-Trek innovations that will be implemented in the ROIC are the ultra low power successive approximation register ADC that will consume between 1-2mW (1/10 the power consumption of similar ADCs on the market), a pre-LVDS driver that will consume a mere 0.5mW (in comparison to 5 mW for a standard LVDS driver, which will be outside the dewar), and a very low power ADC buffer (0.5-1 mW) that is based on the correlated level shifting technique that was invented by the Principle Investigator, Dr. Rob Gregoire. For a ROIC designed for a 512x512 pixel detector consuming ~200mW, the increase in power associated with the on-chip data conversion is between 5mW and 42mW. The first anticipated implementation of a FPA using this ROIC is an upgrade to the MDA interceptor, Standard Missile 3.