Orora Design Technologies, Inc. — Department of Defense STTR Phase I: ABSTRACT: In this project, Orora Design Technologies, Inc. is teaming up with researchers

Description

ABSTRACT: In this project, Orora Design Technologies, Inc. is teaming up with researchers from the University at Albany and the University of Washington to develop techniques to design, simulate and fabricate CMOS-memristor CMOL crossnet building blocks and neuromorphic processors. Phase I objective is to simulate and demonstrate autonomous computing building cell blocks with power consumption of less to 2x10-11 watts and footprint area of less than 2x10-13 m2. Specific emphasis will be on (1) exploring the efficient and reliable fabrication/integration methods for MEMRISTOR devices and CMOS devices; (2) designing and demonstrating a CMOL crossnet cell (3) designing and simulating the CMOS-MEMRISTOR crossnet processor and the development of suitable CAD tool framework. This project is expected to show the potential of memristor-like technology (passive memory devices: memristor, magnetic junction, and/or continuous variable resistance devices) for enabling massively parallel large scale neuromorphic computing processor architecture development. BENEFIT: .. It is expected that this project will enable new ultra-compact, ultra-fast, and self-learning CMOS-memristory systems for both military and commercial applications such as command, control, surveillance and communications, as well as consumer electronics, digital signal processing and biomedical applications.