Space Micro Inc. — National Aeronautics and Space Administration SBIR Phase II: Space Micro proposes to build a radiation hardened by design (RHBD) flash memory, using a
Space Micro Inc. — SBIR Phase II award from National Aeronautics and Space Administration.
- Amount
- $600,000
- Agency
- National Aeronautics and Space Administration
- Program / Phase
- SBIR · Phase II
- NAICS
- —
- Place of performance
- CA
- Period
- 2011-07-20 → 2013-10-31
Description
Space Micro proposes to build a radiation hardened by design (RHBD) flash memory, using a modified version of our RH-eDRAM Memory Controller to solve all the single event effects issues (SEU, SEFI and multiple bit errors) using either a RHBD process with NAND Flash cells. The RH-eFlash will be manufactured on known radiation characterized ASIC processes: examples being 130 nm or 65 nm TSMC or other US foundry equivalents. Using the TSMC example, the resulting RH-eFlash, fabricated on a 65 nm process, provides 512 Mbit to 1 Gbit of radiation hardened (SEU, SEFI, SEL and TID) NAND Flash memory. Operating temperature and packaging reliability is addressed through a thorough memory integrated circuit design (temperature) and post IC high-reliability package selections (i.e. ceramic packages). Note that this technology is portable to future available and radiation tested ASIC processes with even finer geometries and high density.