INTELLISENSE SYSTEMS INC — Department of Defense SBIR Phase II: AF22Z-PDCSO2

Description

To address the Air Force’s need for a common, small-form-factor hardware architecture that fits within a 5-in. tube and eliminates parasitic weapon weight, Intellisense Systems, Inc. (Intellisense) proposes to adapt Intellisense’s proven technologies to achieve a new Common Hardware Architecture for Small-Form-Factor Electronics Reuse (CHASER) hardware standard based on the unique adaptation of existing Intellisense 5-in. cylindrical modular defense systems combining unique use of industry standards (e.g., VITA) for RF and optical blind-mate interconnects, along with new electrical interconnect configurations and innovative weight reduction methodologies  and materials. Specifically, the innovation in novel application of existing industry standards such as VITA 65/66/67, unique use of Intellisense’s proven 5-in. cylindrical modular solution, and new use of a generative design and materials to reduce parasitic weight directly address the Air Force need for weapons system modularity and commonality. Furthermore, this directly addresses the Weapon Open System Architecture (WOSA) need for a hardware standard to support the physical definition of logical domain solutions and verify conformance through conformance test kits. In Phase II, Intellisense plans to complete all remaining hardware architecture developments, trade studies, and manufacturing assessments in order to generate an initial WOSA hardware standard. Through the WOSA working group, stakeholders’ feedback will be obtained and addressed, leading to physically representative prototypes showcasing the CHASER approach. Plans for follow-on development will be generated including development of conformance test kits derived from the initial standard with a pathway toward ratification. These prototyping efforts will be used to mitigate manufacturing, production, and safety issues with the technical requirements. Overall, the approach is expected to reduce lifecycle sustainment costs and subsystem component availability.