Silicon Space Technology Corporation — National Aeronautics and Space Administration SBIR Phase I: S3.09
Silicon Space Technology Corporation — SBIR Phase I award from National Aeronautics and Space Administration.
- Amount
- $124,808
- Agency
- National Aeronautics and Space Administration
- Program / Phase
- SBIR · Phase I
- Topic
- S3.09
- NAICS
- —
- Place of performance
- TX
- Period
- 2015-06-17 → 2015-12-17
Description
Every CubeSat design is different with different requirements. However the number of similarities between CubeSat designs is greater than between any two larger spacecraft. Leveraging these similarities and by applying a modular design approach we can develop a small family of motherboards that can fulfill the needs of any CubeSat mission. The computing elements of a 1-3U motherboard and a 6U motherboard are the same. The differences between these CubeSat bus architectures exist outside the computing element. Thus, we can move the computing elements off of the motherboard and into a self-contained Compute Module (CM). The CM contains all the elements needed for a self-contained computer. The CM is attached to an Application Specific Daughter Card (ASDC). Together the CM and ASDC provide the capabilities needed for a specific task. This standard module will consist of a physical form factor, electrical connections and design specifications for the ASDC. The initial Compute Module (CM) design specifications will utilize SST' modified ARM® Cortex®-M0 microcontroller, motherboard for the 1-3U and a 6U CubeSat bus configuration.