QUNAV LLC — Department of Defense SBIR Phase I: N224-130

QUNAV LLC — SBIR Phase I award from Department of Defense.

Amount
$239,920
Agency
Department of Defense · Navy
Program / Phase
SBIR · Phase I
Topic
N224-130
Solicitation
22.4
NAICS
Place of performance
FL
Period
2023-01-30 → 2024-02-20

Description

QuNav proposes the development of a prototype of GPS interference direction finding sensor for surface and subsurface vessels to provide situational awareness of jamming and/or spoofing attacks in GPS Interference Direction of Arrival (DOA) Initiative for User Purposes (GIDI-UP). The hardware prototype will consist of five subsystems, namely, (i) an array configuration, (ii) a multi-channel SDR receiver based on USRP, (iii) an external clock and clock distribution system, (iv) a PC-based multi-channel data acquisition, storage, and processing system, and (v) a power supply system. The software prototype will adopt a cascaded pre/post-correlation signal-processing architecture to enable precise DOA estimation capability under coordinated jamming and spoofing attacks. The pre-correlation jamming detection, estimation, and suppression module performs jamming suppression by projecting the array output onto the jamming nullspace with jamming DOA estimation while preserving the spatial information. The post-correlation spoofing detection, estimation, and tracking module adopts a master-slave configuration for phase coherency with cross-nullspace projection to reduce the effect of correlation between spoofing and authentic signals. An innovative spatial-combining scheme can significantly improve the DOA estimation performance, while maintaining GPS acquisition and tracking under jamming and spoofing conditions. The system design approach addresses shipboard multipath, which can be detrimental to both positioning and angular estimation. It further incorporates a self-calibration procedure for the antenna array. Experimental data will be used in Phase I to develop enabling techniques and validate computational algorithms for Phase II embedded prototyping and demonstration.