Systems & Processes Engineering Corporation — Department of Defense SBIR Phase II: There is need to more accurately test Digital RF Memory (DRFM) devices in an Installed Sys

Systems & Processes Engineering Corporation — SBIR Phase II award from Department of Defense.

Amount
$749,929
Agency
Department of Defense · Navy
Program / Phase
SBIR · Phase II
Solicitation
2010.1
NAICS
Place of performance
TX
Period
2011-06-30

Description

There is need to more accurately test Digital RF Memory (DRFM) devices in an Installed System Test Facility (ISTF) to reduce cost and time required in comparison with flight testing. The Joint Integrated Mission Model (JIMM) is a mission-level, discrete-event, general-purpose simulator that is capable of integrated operation with real hardware components. It is ideally suited to act as an ISTF for DRFM testing, but to do so must have a means of providing coaxially-injected RF signals with real time emulation of range delay to distances of 27,000 nautical miles (Nmi) without degradation of the signals. To satisfy this objective, in Phase II of this contract Systems & Processes Engineering Corporation (SPEC) plans to leverage our Phase I accomplishments and our experience with the development of the Agile Digital Effects Processor (ADEP) technology, to create the Range Delay Emulator (RADE). ADEP combines RF signal characterization, DRFM and arbitrary waveform generation capabilities. Signal modulation is entirely digital, and is enabled by breakthroughs that provide streaming data conversion at rates many times apparent component limits. RADE will provide precise signal / waveform generation without artifacts or signal quality reduction and will provide memory for one way range delays exceeding 27,000 Nmi.