Higher Wire, Inc. — Department of Energy SBIR Phase II: C54-06a

Higher Wire, Inc. — SBIR Phase II award from Department of Energy.

Phase II SBIR prototype / development signal

  • Phase II is where Department of Energy funds deeper R&D after feasibility. Incumbents with Phase II history are serious competitors on adjacent topics.
  • Use this award as past-performance context and to map customer organizations for STRATFI/TACFI-style transition planning.
  • Obligated amount $1,016,777 is consistent with substantial Phase II-scale effort; compare to related awards from the same agency.
  • Topic code C54-06a links this award to a solicitation family — search the same topic stem for incumbents and recompete timing.

Informational capture context from public federal data — not legal or bid advice.

Amount
$1,016,777
Agency
Department of Energy
Program / Phase
SBIR · Phase II
Topic
C54-06a
NAICS
Place of performance
AZ
Period
2023-08-28 → 2025-08-27

Description

This proposal primarily targets a well-rounded approach of ‘design for manufacturing’ and ‘design for efficiency’ for a wide bandgap (WBG) semiconductor-based solution of an integrated, modular, multi-port, multi-directional and efficient power conversion system (PCS) with greater design flexibility and improved control. The PCS is capable of seamlessly integrating various types of energy storage systems (ESS) and renewable energy sources and thus providing sustainable power solutions for disadvantaged communities such as on Native Tribal lands. In Phase-II, we propose to advance the Silicon Carbide (SiC) and Gallium Nitride (GaN)-based multi-port PV-ESS-grid-integrated DC-AC-DC power conversion technology one step closer to the commercialization through making it a highly efficient, power dense, electromagnetic interference (EMI) compliant, fault tolerant, and cost-effective solution. Our Phase-I project ended up with successful development and hardware prototyping of a 2kW-rated SiC/GaN-based multiport converter solution integrating 25V-40V solar PV, 28V ESS, and 120V rms AC grid followed by an experimental validation up to 500W, resulting in 95% overall efficiency. In Phase-II, the following design modifications would be made based on our customer discovery outcomes: (a) port-I is a string of PV panels with a terminal voltage of 180V to 360V (assuming there are 6 series-connected PV panels, each with an open circuit voltage of 60V), (b) the AC-side port-2 voltage would be reconfigurable between 120V and 240V rms depending on whether the PCS unit will be deployed in high-line or a low-line grid settings, (c) the port-3 ESS voltage is selected as 48V which is widely adopted due to less safety considerations during portability of the PCS unit, and (d) the operating power level is selected to be 3.3kW, which closely matches with the emerging trends of the residential inverters. Further, the DC link film or electrolytic capacitors that are conventionally used on the input (PV) or battery (ESS) side will be replaced by a GaN half-bridge based actively controlled power pulsating buffer (PPB) solution that significantly reduces the capacitance requirement, which is then realized by high-reliability and low ESL ceramic capacitors – thus increasing the system-level mean time to failure (MTTF).