WINCHESTER TECHNOLOGIES LLC — Department of Defense SBIR Phase I: A17-019
WINCHESTER TECHNOLOGIES LLC — SBIR Phase I award from Department of Defense.
Phase I SBIR feasibility signal
- Phase I awards fund proof-of-concept work. For capture teams, they mark early interest from Department of Defense in a technical approach.
- Watch for Phase II follow-ons from the same firm/topic family — that conversion path is where budgets and transition pressure rise.
- Obligated amount $149,999. Cross-check similar awards in the same agency and technology tags for going-rate context.
- Topic code A17-019 links this award to a solicitation family — search the same topic stem for incumbents and recompete timing.
- Amount
- $149,999
- Agency
- Department of Defense · Army
- Program / Phase
- SBIR · Phase I
- Topic
- A17-019
- Solicitation
- 2017.1
- NAICS
- —
- Place of performance
- MA
- Period
- 2017-08-14 → 2018-11-26
Description
Different tuning technologies have been used for tunable microwave devices, including semiconductor varactors, ferroelectric based varactors, magnetic field tunable ferromagnetic resonance, MEMS switches, voltage tunable multiferroic heterostructures with voltage tunable permeability or ferromagnetic resonance, etc. However, voltage-tunable inductance, permeability or FMR frequency has not been made possible until recently demonstrated by subcontractor PI Sun et al. In the Phase I of this project, we propose to develop and demonstrate CMOS-compatible low temperature sputtering and spin-coating deposition process for high quality multiferroic thin film heterostructures with large piezo-magnetic coefficient of >5ppm/Oe, low magnetic loss tangent <5% at 1GHz, and large magnetoelectric coupling coefficient of > 1 V/cm/Oe. In Phase II of this project, we will demonstrate CMOS compatible magnetic/piezoelectric heterostructures with large magnetoelectric coupling coefficient of > 2 V/cm/Oe, and integrated voltage multiferroic bandstop filters and integrated voltage tunable multiferroic inductors on the basis of the CMOS compatible magnetic/piezoelectric heterostructures developed in Phase I period. This project will enable direct integration of multiferroic devices onto CMOS integrated circuits (ICs), and significantly extend the functionality of CMOS ICs.