NANOHMICS INC — National Aeronautics and Space Administration STTR Phase I: T12

NANOHMICS INC — STTR Phase I award from National Aeronautics and Space Administration.

Amount
$156,472
Agency
National Aeronautics and Space Administration
Program / Phase
STTR · Phase I
Topic
T12
Solicitation
STTR_23_P1
NAICS
Place of performance
TX
Period
2023-07-20 → 2024-09-02

Description

Recent advances in techniques for Additively Manufactured Electronics (AME) have the potential to produce electronics assemblies that are uniquely compact and conformable, but these techniques have not been proven effective for space applications. Designing and fabricating printed circuit boards (PCBs) that can meet rigorous space flight qualifications specifications is challenging. There are currently no additive manufacturing technologies that can produce PCBs that meet the temperature cycles, shock, vibration, radiation, vacuum, and electromagnetic interference and compatibility requirements. Nanohmics, Inc., in collaboration with Professor Maggie Chen at Texas State University, proposes to leverage advances in 3D printing and photonic curing, materials engineering of highly conductive inks, and integration techniques to demonstrate Space-Qualified, 3D-Printed, Electronic Assembly Demonstration (SPEAD) PCBs. Specifically, the team will demonstrate highly conductive traces fabricated using advanced graphitic inks and novel aerosol inkjet printing, laser-sintered process. In the Phase I effort, the team will demonstrate a SPEAD PCB prototype by designing and fabricating a series of test circuits using graphitic ink on Kapton substrates. The graphitic ink component is based on a high conductivity (6.25x105 S/m) and temperature (gt;300deg;C) material. These test circuits will be based on the design of previously space qualified hardware. The prototypes PCBs will demonstrate the integration of commercial-off-the-shelf (COTS) integrated circuits (ICs) in standard surface mount packages with high conductivity traces on a flexible, high temperature substrate. In the Phase II effort, the team will focus on expanding the capabilities of the SPEAD PCB manufacturing process to provide new capabilities, such as multiple layers, integration of passive components, and demonstration of 3D integration to reduce overall component assembly volume.