PACIFIC MICROCHIP CORP. — Department of Energy SBIR Phase II: C53-33b

Description

C53-33b-271411There is a paradigm shift in design of NP detectors towards using streaming readout technologies to replace the triggered readout electronics. These detectors employ thousands of readout channels working at increasingly high event rate. If based on off-the-shelf components, the electronics occupy large volume, dissipate excessive heat and cannot tolerate high TID levels. Pacific Microchip Corp. proposes to develop a TID tolerant ASIC to support high-speed streaming readout for segmented detectors. The ASIC includes a continuously sampling 32-channel 12-bit 1GS/s ADC IP block, a high-performance DSP block and an event building back-end. In addition, the ASIC can capture and stream out the event related waveform samples (including the pre- and post-event). The ADC will digitize while the DSP block will shape the event related pulses, restore the baseline, detect the pulse peak, analyze its amplitude, timing, add the channel address information, compress the data and ship it out to the PCB. This ASIC will facilitate the detector systems to support streaming readout while simultaneously increasing the readout speed, TID tolerance, cost effectiveness, robustness and will lower power consumption. In Phase I, the ASIC’s architecture was developed, the TID immunity of the ADC IP block was tested, the critical circuits were designed, and the proof of feasibility was provided. Phase II will result in the fabricated and tested ASIC’s prototype. In addition to such instruments as “pECal” (forward electromagnetic calorimeter in the proton/ion going direction) for the EPIC detector, the ASIC can find application in radiography instruments in medicine, imaging systems for airport security, border/customs control, industrial radiography systems for non- destructive defect detection. Currently, there is no TID tolerant ASIC that can perform the DSP function simultaneously in 32 channels on event produced pulses digitized at 1GS/s. The ASIC will be provided as a component, and as an IP block. According to “Allied Market Research”, the global sensor technology market is growing annually at a CAGR of 8.9% and is expected to reach $345.77B by 2028. The ASIC can also be used as a multichannel ADC. According to the ADC market analysis provided by Reports and Data, “The Analog-To-Digital Converters market is projected to grow at a rate of 4.9% in terms of value, from USD 2.66 Billion in 2020 to reach USD 3.88 Billion by 2028”. These projections confirm the great commercial potential for the proposed ASIC.