EDAPTIVE COMPUTING INC — Department of Defense SBIR Phase I: DMEA221-001
EDAPTIVE COMPUTING INC — SBIR Phase I award from Department of Defense.
- Amount
- $167,382
- Agency
- Department of Defense · Defense Microelectronics Activity
- Program / Phase
- SBIR · Phase I
- Topic
- DMEA221-001
- Solicitation
- 22.1
- NAICS
- —
- Place of performance
- OH
- Period
- 2022-07-22 → 2023-02-01
Description
Develop a library of practical synthesizable register transfer logic (RTL) assertions (System Verilog is highly preferred), investigate limitations of synthesizable assertions in both integrated circuit (IC) and field programmable gate array (FPGA) design and design verification flows using already existing EDA platforms, and develop a methodology for synthesizable RTL assertions and error reporting. Identify robust test vehicles and implement synthesizable RTL assertions in both an FPGA and an IC.