COOLCAD ELECTRONICS, INC. — Department of Defense SBIR Phase I: A22-006

Description

In this Phase I program, CoolCAD Electronics proposes to build on our extensive experience with modeling, designing, fabricating and characterizing SiC devices and circuits, in particular optoelectronic devices and circuits, to fabricate new generations of avalanche photodiodes (APDs) in an effort to meet the needs of the U.S. Army and of broader applications. The ultimate target of a three-phase program is the development of a small module (<9x9x4 cm3) incorporating a detector with single photon detection efficiency >15%, dark count rate density <1MHz/mm2, and maximum photon count rate >1MHz, across a minimum 50-nm window within the 200-375 nm UV spectrum, with visible light rejection ratio >1000. We choose SiC as our semiconductor material due to its high sensitivity in the target spectrum range, its inherent visible blindness, and low intrinsic carrier concentration allowing for a lower dark current level, all else being equal. Our previous generation SiC APDs exhibit high sensitivity and low dark count with excellent visible light rejection. Through the course of this Phase I program we will refine their performance by following a multi-pronged approach: First, we will fabricate new diodes using SiC wafers with an improved epitaxial structure, which should result in lower dark current and dark count and impact sensitivity and spectral range. During this fabrication, we will also improve the fabrication process, particularly the method to passivate the exposed sidewall regions of the sensor devices, which can also reduce dark count. Simultaneously, we will use our extensive background in physics-based SiC device modeling to design the next generation of APDs, with refined wafer structures, doping parameters, and geometry. The target will be to enhance the intrinsic gain of the avalanching mechanism within the bulk of the device, while suppressing leakage current generation and amplification on the surface or elsewhere. We will also use our process modeling experience to further improve passivation processes by modeling. Our device development will go hand in hand with readout circuit development as we create compact models of fabricated and simulated devices and use these to optimize, in particular, a Geiger-mode counter circuit. In conjunction with this effort, we will develop improved packaging solutions for our sensors, allowing us to prepare for the eventual design of an integrated modular sensor. As a first step on this path, we will integrate the diodes fabricated during this Phase I with a Geiger-mode circuit implemented on a small printed circuit board. This entire effort will be supported and guided by an extensive test and characterization program, allowing us to demonstrate a clear pathway to fully meeting and exceeding all the required specifications in a potential Phase II and beyond.